The present invention pertains to the field of computer architecture design. More particularly, the present invention relates to a method of modulating the frequency and voltage of a central processing unit core based on the level of multi-threadedness.
A computer typically executes program codes of an application using a single processing thread. Computers, however, are not limited to single-threaded (ST) workloads. In a multi-threaded (MT) workload, the execution of the program is divided into several related, yet at least partially independent tasks. The tasks are performed in parallel with one another on separate processing cores.
While a MT workload typically provides better performance over a ST workload, the MT workload also consumes more power. In battery powered computer systems such as a laptop or notebook, the higher the power consumption, the faster the remaining battery life is depreciated.